Wednesday, October 9, 2013
Press Release: Carnegie Mellon's Center for Silicon System Implementation Receives $2.6 Million NSF Grant To Develop Next-Generation Chips
Contact: Chriss Swaney / 412-268-5776 / email@example.com
PITTSBURGH—Carnegie Mellon University's Center for Silicon System Implementation (CSSI) has received a $2.6 million grant from the National Science Foundation (NSF) to develop next-generation ultra-efficient silicon chips that could trigger a revolution in how chips are designed and operated.
"This grant will help us give silicon chips the ability to learn more from their own big data so they can change their mission to better match the needs of the user," said Shawn Blanton, head of the CSSI and a professor of electrical and computer engineering (ECE) at CMU.
The three-year initiative involves eight faculty members from ECE as well as the Robotics Institute, who have expertise in a variety of areas that include circuit design, computer architecture, integrated circuit chip manufacturing, cybersecurity and statistical learning.
At the heart of all electronic systems, from smartphones to massive data centers that house our digital lives, are tiny silicon chips that store, process and transport trillions of bits of information every second of every day. Due to massive improvements in silicon chip technology during the past few decades, users are now at the cusp of a new age of ubiquitous computing with intelligent electronic systems permeating nearly every aspect of people's lives, from wearable computers to autonomously driven cars, and even bio-implantable electronics within their bodies.
"Yet ironically, for a technology that has imbued nearly every object with some level of intelligence, the management of a silicon chip's internal resources and infrastructure is largely ad hoc and piecemeal, leading to sub-optimal utilization of chip resources. This lack of sophistication means that today's chips actually waste a significant fraction of the power they burn, leading to shorter battery lives, higher data center power demands, and ultimately less efficient use of the world's shrinking energy supply," Blanton said.
Because today's silicon chips are so complex, CMU researchers have launched the SLIC (Statistical Learning In Chip) project that seeks to holistically integrate the management of a silicon chip's resources using machine learning.
"A SLIC-enabled integrated circuit could continually monitor its own performance and conditions to ensure that it is always operating at optimal efficiency," Blanton explained. "The high-speed, high efficiency SLIC engines also will enhance applications outside the chip like improving new smart systems, such as sensors that predict blood sugar levels for controlling diabetes or streamlining brain-computer interfaces for controlling prosthetic limbs."
According to Blanton, SLIC technology also can be applied to critical infrastructure supervisory control and data systems, such as the electric power grid, air traffic control and telecommunications infrastructure.
Ed Schlesinger, ECE department head and the David Edward Schramm Memorial professor of electrical and computer engineering at CMU, said, "The research has tremendous impact as the team works essentially to develop a new paradigm in IC technology where the chips themselves have a kind of intelligence and thus provide far superior performance to the systems they are part of."
For additional information about the project, see http://www.ece.cmu.edu/-cssi
Shawn Blanton (pictured above), head of the Center for Silicon System Implementation and a professor of electrical and computer engineering (ECE) at CMU, says, today's silicon chips actually waste a significant fraction of the power they burn, leading to shorter battery lives, higher data center power demands, and ultimately less efficient use of the world's shrinking energy supply.