Carnegie Mellon University

David L. Landis

David L. Landis

Executive Director of the Masters program in Energy Science, Technology and Policy

Department of Materials Science and Engineering
Carnegie Mellon University
5000 Forbes Avenue
Pittsburgh, PA 15213


Dave Landis obtained the Ph.D. in Electrical Engineering from The Pennsylvania State University, MS in Systems Engineering from the University of Pennsylvania, and BS in Electrical Engineering from Carnegie Mellon. Prior to joining CMU in 2010 he served the non-profit community for 10 years as V.P. Education and Training at The Technology Collaborative and the Pittsburgh Digital Greenhouse. He supported technology-based economic development programs by creating and managing professional development, workforce development, university curriculum and entrepreneurship programs. His previous faculty appointments included Professor of Electrical Engineering at the University of South Florida and at Penn State. His industrial experience includes work at RCA’s Advanced Technology Laboratory and Honeywell’s Space Systems Group.


Ph.D., The Pennsylvania State University, 1982


My earlier work considered problems in integrated circuit design and test, including: chip-scale system architecture, rapid electronic system prototyping, design for test and self-test, defect & fault tolerant system design. I am currently interested in problems of embedded systems safety, integrity, and security when applying modern information technology to energy systems.


P. Singh, V. Narayanan, D. Landis, “Targeted Random Test Generation for Power Aware Multicore Designs”, ACM Trans. Des. Autom. Electron Syst. 17, 3, Article 25 (June 2012) 19 pages.

P.Singh, V. Narayanan, D. Landis, "Hazard Dri en Test Generation for SMT Processors", Proceedings of the Design, Automation and Test in Europe Conference and Exposition (DATE), Dresden Germany, March 12-16 2012 pp.259-259

P. Singh, D. Landis, V. Narayanan, “Test Generation for Precise Interrupts on Out-of-Order Microprocessors”, Proceedings of the 10th International Workshop on Microprocessor Test and Verification, Austin TX, December 2009.

D. Landis, C. Adukaitis, S. Komacek, R. Shoop, “Steps Along a Robotics Technology Career Pathway”, Proceedings of the 2008 American Society for Engineering Education Annual Conference, Pittsburgh PA, July 2008.

T. Kroll, H. Schmit, and D. Landis, “CAD Tool Support for a Multi-University SoC Certificate Program: The Digital Sandbox”, Proc. of the 2003 Intl. Conf. On Microelectronic Systems Education, Anaheim CA, June 2003, pp. 47-48.

D. Landis, P. Khosla, H. Schmit, J. Irwin, N. Vijaykrishnan, T. Cain, S. Levitan, “SoC Design Skills:  Collaboration Builds a Stronger SoC Design Team”, Proc. 2001 IEEE Intl. Conf. On Microelectronic Systems Education, Las Vegas, NV, June 2001, pp.42-43.

B. Shaer, & D. Landis, & S. A. Al-Arian, “Partitioning Algorithm to Enhance Pseudoexhaustive Testing of Digital VLSI Circuits”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol.8, No.6, December 2000, pp. 750-754.