Time Aware Applications, Computers and Communication Systems-Silicon Valley Campus - Carnegie Mellon University

Cross-disciplinary research on time-aware applications, computers and communication systems (TAACCS)

A new economy built on the massive growth of endpoints on the internet will require precise and verifiable timing in ways that current systems do not support. Applications, computers and communications systems have been developed with modules and layers that optimize data processing but degrade accurate timing. State-of-the-art systems now use timing only as a performance metric. Correctness of timing as a metric cannot currently be designed into systems independent of hardware and/or software implementations.

To enable the massive growth predicted, accurate timing needs cross-disciplinary research to be integrated into these existing systems. Different criteria are needed for different endpoints on the network, such as: accuracy versus stability for time, phase and frequency synchronization. In addition to accuracy, security issues represent another critical need. In many cases, having assurance that the time is correct is a more difficult problem than accuracy. Security issues include protection from attack, and having means to verify that the time is correct.

TAACCS in the News

The TAACCS white paper was featured in an NIST Technote, Lack of Effective Timing Signals Could Hamper "Internet of Things" Development, which was picked up on Slashdot and other online media outlets. See more on TAACCS.org


From the Steering Committee; download the executive summary and white paper

Research Summary

Research is conducted in six layers:

  • Oscillators
  • Time transfer systems
  • Time-aware networks
  • Timing support
  • Development environments
  • Applications


  • Bob Iannucci (CMU-SV)
  • Marc Weiss (NIST, Time and Frequency Division) 
  • John Eidson (University of California at Berkeley)
  • Charles Barry (CTO, Jolata Inc.)
  • Leon Goldin (Technical leader, Cisco Systems)
  • Edward Lee (EECS Department, University of California at Berkeley)
  • Kevin Stanton (Principal Engineer, Intel Corporation)