TOCS Event-Silicon Valley Campus - Carnegie Mellon University

TOCS Event


Caitlin Sadowski

Caitlin Sadowski
Ph.D. candidate
UC Santa Cruz


February 21, 1:30 pm



CMUSV, Rm 118 [directions]

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Title: Correctness and Programming with Threads
Abstract: Multi-core processors, common in modern embedded devices and computers, pose significant challenges to the programmer. Multithreaded programs are increasingly common, hard to get right, and may fail tests non-deterministically. To deal with these challenges, developers use a variety of analysis tools to find concurrency bugs in multithreaded programs, and are even willing to add lightweight annotations. But, what does correctness mean for multithreaded programs? There are a variety of specification idioms developers use when reasoning about the concurrency in their programs. This talk examines two different correctness conditions for concurrent programs: deterministic parallelism and cooperability, and how to dynamically analyze Java programs for these properties.
Speaker Bio: Caitlin Sadowski is a computer science Ph.D. candidate at the University of California at Santa Cruz, where she works on a variety of research topics at the intersection of Software Engineering and Human Computer Interaction, mostly related to parallel computing. She has developed multiple dynamic program analyses targeted at concurrency errors and has recently been researching developers mental models of concurrent programs. She has won two best paper awards, most recently at OOPSLA 2011 for “Two for the Price of One: A Model for Parallel and Incremental Computation,” a paper that leverages incremental memorization to speed up parallel programs. She is a contributor to the Clang C/C++ compiler and helped developed Microsoft Research’s Practical Parallel and Concurrent Programming (PPCP) course materials. She co-chaired the 2011 Workshop on Transitioning to MultiCore (TMC), co-located with OOPSLA/SPLASH, and the upcoming 2012 Workshop on User evaluation for Software Engineering Researchers (USER), co-located with ICSE.